Emerging tunnel FET and spintronics-based hardware-secure circuit design with ultra-low energy consumption
نویسندگان
چکیده
Present complementary metal–oxide–semiconductor (CMOS) technology with scaled channel lengths exhibits higher energy consumption in designing secure electronic circuits against hardware vulnerabilities and breaches. Specifically, CMOS sense amplifier-based differential power analysis (DPA) countermeasures at show large consumption, increased vulnerability. Additionally, spin-transfer torque magnetic tunnel junction (STT-MTJ) CMOS-based logic-in-memory (LiM) cells demonstrate high due to the write current requirement of STT-MTJ poor MOS device performance lengths. This paper for first time leverages emerging field effect transistor (TFET) steep-slope characteristics compatible non-volatile devices enhanced security ultra-low lower supply voltages. TFET-based logic (SABL) gates are proposed that achieve 3× than Si FinFET SABL designs. Further, utilizing TFET gates, a PRIDE S-box is designed DPA resilience 3.2× With resulting static SABL-based cryptosystems thus less vulnerable side-channel attacks. LiM 4× Lastly, these explored encryption/locking technique shows 3.1× FinFET-based design.
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ژورنال
عنوان ژورنال: Journal of Computational Electronics
سال: 2022
ISSN: ['1572-8137', '1569-8025']
DOI: https://doi.org/10.1007/s10825-022-01958-x